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MC10EP116 Hex Differential Line Receiver
The MC10EP116/100EP116 is a 6-bit differential line receiver based on the EP16 device. The 3.0GHz bandwidth provided by the high frequency outputs makes the device ideal for buffering of very high speed oscillators. A VBB pin is available to AC couple an input signal to the device. More information on AC coupling can be found in the design handbook interfacing with ECLinPS on our website. The design incorporates two stages of gain, internal to the device, making it an excellent choice for use in high bandwidth amplifier applications. The differential inputs have internal clamp structures which will force the Q output of a gate in an open input condition to go to a LOW state. Thus, inputs of unused gates can be left open and will not affect the operation of the rest of the device. Note that the input clamp will take affect only if both inputs fall 2.5V below VCC. All VCC and VEE pins must be externally connected to power supply to guarantee proper operation.
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32-LEAD TQFP FA SUFFIX CASE 873A
MARKING DIAGRAM*
* * * * * * * * * * * *
230ps Typical Propagation Delay High Bandwidth to 3.0 GHz Typical PECL mode: 3.0V to 5.5V VCC with VEE = 0V ECL mode: 0V VCC with VEE = -3.0V to -5.5V Internal Input Resistors: Pulldown on D, Pulldown and Pullup on D Q Output will default LOW with inputs open or at VEE ESD Protection: 2KV HBM, 100V MM VBB Output New Differential Input Common Mode Range Moisture Sensitivity Level 2 For Additional Information, See Application Note AND8003/D Flammability Rating: UL-94 code V-0 @ 1/8", Oxygen Index 28 to 34 Transistor Count: 729 devices
LOGIC DIAGRAM
D0 D0 D1 D1 D2 D2 D3 D3 D4 D4 D5 D5 VBB Q0 Q0 Q1 Q1 Q2 Q2 Q3 Q3 Q4 Q4 Q5 Q5
MC10 EP116 AWLYYWW 32 1
A WL YY WW
= Assembly Location = Wafer Lot = Year = Work Week
*For additional information, see Application Note AND8002/D
PIN DESCRIPTION
PIN D[0:5], D[0:5] Q[0:5], Q[0:5] VBB VCC VEE FUNCTION ECL Differential Data Inputs ECL Differential Data Outputs Reference Voltage Output Positive Supply Negative, 0 Supply
ORDERING INFORMATION
Device MC10EP116FA MC10EP116FAR2 Package TQFP TQFP Shipping 250 Units/Tray 2000 Tape & Reel
(c) Semiconductor Components Industries, LLC, 2000
1
March, 2000 - Rev. 3
Publication Order Number: MC10EP116/D
MC10EP116
D4 D5 D5 Q5 Q5 Q4 Q4 VCC
24 D4 D3 D3 VEE D2 D2 D1 D1 25 26 27 28
23
22
21
20
19
18
17 16 15 14 13 VCC Q3 Q3 VCC VCC Q2 Q2 VCC
MC10EP116
29 30 31 32 1 2 3 4 5 6 7 8 12 11 10 9
D0
D0 VBB Q0
Q0
Q1
Q1 VEE
Figure 1. 32-Lead LQFP Pinout (Top View)
Warning: All VCC and VEE pins must be externally connected to Power Supply to guarantee proper operation.
MAXIMUM RATINGS*
Symbol VEE VCC VI VI Iout IBB TA Tstg JA JC Tsol Power Supply (VCC = 0V) Power Supply (VEE = 0V) Input Voltage (VCC = 0V, VI not more negative than VEE) Input Voltage (VEE = 0V, VI not more positive than VCC) Output Current VBB Sink/Source Current{ Operating Temperature Range Storage Temperature Thermal Resistance (Junction-to-Ambient) Thermal Resistance (Junction-to-Case) Solder Temperature (<2 to 3 Seconds: 245C desired) Still Air 500lfpm Continuous Surge Parameter Value -6.0 to 0 6.0 to 0 -6.0 to 0 6.0 to 0 50 100 0.5 -40 to +85 -65 to +150 80 55 12 to 17 265 Unit VDC VDC VDC VDC mA mA C C C/W C/W C
* Maximum Ratings are those values beyond which damage to the device may occur. { Use for inputs of same package only.
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MC10EP116
DC CHARACTERISTICS, ECL/LVECL (VCC = 0V; VEE = -5.5V to -3.0V) (Note 4.)
-40C Symbol IEE VOH VOL VIH VIL VBB Characteristic Power Supply Current (Note 1.) Output HIGH Voltage (Note 2.) Output LOW Voltage (Note 2.) Input HIGH Voltage Single Ended Input LOW Voltage Single Ended Output Voltage Reference Min 55 -1135 -1995 -1210 -1935 -1575 -1475 -1060 -1810 Typ Max 95 -885 -1685 -885 -1610 -1375 0.0 150 D D 0.5 -150 0.5 -150 Min 55 -1070 -1995 -1145 -1870 -1540 -1440 25C Typ 80 -945 -1745 Max 95 -820 -1620 -820 -1545 -1340 0.0 150 0.5 -150 Min 55 -1010 -1995 -1085 -1810 -1515 -1415 -885 -1685 85C Typ Max 95 -760 -1560 -760 -1485 -1315 0.0 150 Unit mA mV mV mV mV mV V A A
VIHCMR Input HIGH Voltage Common Mode Range (Note 3.) IIH IIL Input HIGH Current Input LOW Current
VEE+2.0
VEE+2.0
VEE+2.0
NOTE: 10EP circuits are designed to meet the DC specifications shown in the above table after thermal equilibrium has been established. The circuit is in a test socket or mounted on a printed circuit board and transverse airflow greater than 500lfpm is maintained. 1. VCC = 0V, VEE = VEEmin to VEEmax, all other pins floating. 2. All loading with 50 ohms to VCC-2.0 volts. 3. VIHCMR min varies 1:1 with VEE, max varies 1:1 with VCC. 4. Input and output parameters vary 1:1 with VCC.
DC CHARACTERISTICS, LVPECL (VCC = 3.3V 0.3V, VEE = 0V) (Note 8.)
-40C Symbol IEE VOH VOL VIH VIL VBB Characteristic Power Supply Current (Note 5.) Output HIGH Voltage (Note 6.) Output LOW Voltage (Note 6.) Input HIGH Voltage Single Ended Input LOW Voltage Single Ended Output Voltage Reference Min 55 2165 1305 2090 1365 1725 2.0 1825 2240 1490 Typ Max 95 2415 1615 2415 1690 1925 3.3 150 D D 0.5 -150 0.5 -150 Min 55 2230 1305 2155 1430 1760 2.0 1860 25C Typ 80 2355 1555 Max 95 2480 1680 2480 1755 1960 3.3 150 0.5 -150 Min 55 2290 1305 2215 1490 1785 2.0 1885 2415 1615 85C Typ Max 95 2540 1740 2540 1815 1985 3.3 150 Unit mA mV mV mV mV mV V A A
VIHCMR Input HIGH Voltage Common Mode Range (Note 7.) IIH IIL Input HIGH Current Input LOW Current
NOTE: 10EP circuits are designed to meet the DC specifications shown in the above table after thermal equilibrium has been established. The circuit is in a test socket or mounted on a printed circuit board and transverse airflow greater than 500lfpm is maintained. 5. VCC = 3.0V, VEE = 0V, all other pins floating. 6. All loading with 50 ohms to VCC-2.0 volts. 7. VIHCMR min varies 1:1 with VEE, max varies 1:1 with VCC. 8. Input and output parameters vary 1:1 with VCC.
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MC10EP116
DC CHARACTERISTICS, PECL (VCC = 5.0V 0.5V, VEE = 0V) (Note 12.)
-40C Symbol IEE VOH VOL VIH VIL VBB Characteristic Power Supply Current (Note 9.) Output HIGH Voltage (Note 10.) Output LOW Voltage (Note 10.) Input HIGH Voltage Single Ended Input LOW Voltage Single Ended Output Voltage Reference Min 55 3865 3005 3790 3065 3425 2.0 3525 3940 3190 Typ Max 95 4115 3315 4115 3390 3625 5.0 150 D D 0.5 -150 0.5 -150 Min 55 3930 3005 3855 3130 3460 2.0 3560 25C Typ 80 4055 3255 Max 95 4180 3380 4180 3455 3660 5.0 150 0.5 -150 Min 55 3990 3005 3915 3190 3485 2.0 3585 4115 3315 85C Typ Max 95 4240 3440 4240 3515 3685 5.0 150 Unit mA mV mV mV mV mV V A A
VIHCMR Input HIGH Voltage Common Mode Range (Note 11.) IIH IIL Input HIGH Current Input LOW Current
NOTE: 10EP circuits are designed to meet the DC specifications shown in the above table after thermal equilibrium has been established. The circuit is in a test socket or mounted on a printed circuit board and transverse airflow greater than 500lfpm is maintained. 9. VCC = 5.0V, VEE = 0V, all other pins floating. 10. All loading with 50 ohms to VCC-2.0 volts. 11. VIHCMR min varies 1:1 with VEE, max varies 1:1 with VCC. 12. Input and output parameters vary 1:1 with VCC.
AC CHARACTERISTICS (VCC = 0V; VEE = -3.0V to -5.5V) or (VCC = 3.0V to 5.5V; VEE = 0V)
-40C Symbol fmax tPLH, tPHL tSKEW tJITTER VPP Characteristic Maximum Toggle Frequency (Note 13.) Propagation Delay to Output Differential Duty Cycle Skew (Note 14.) Cycle-to-Cycle Jitter Input Voltage Swing (Diff.) 150 150 250 5.0 TBD 800 1200 150 350 150 Min Typ Max Min 25C Typ 3.0 250 5.0 TBD 800 1200 150 350 20 180 280 5.0 TBD 800 1200 380 20 Max Min 85C Typ Max Unit GHz ps ps ps mV
tr Output Rise/Fall Times Q 90 150 220 90 160 240 90 160 250 ps tf (20% - 80%) 13. Fmax guaranteed for functionality only. 14. Skew is measured between outputs under identical transitions. Duty cycle skew is defined only for differential operation when the delays are measured from the cross point of the inputs to the cross point of the outputs.
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MC10EP116
PACKAGE DIMENSIONS
TQFP FA SUFFIX 32-LEAD PLASTIC PACKAGE CASE 873A-02 ISSUE A
A A1
32 25 4X
0.20 (0.008) AB T-U Z
1
-T- B B1
8
-U- V P DETAIL Y
17
AE
V1 AE DETAIL Y
9
-Z- 9 S1 S
4X
0.20 (0.008) AC T-U Z
G -AB-
SEATING PLANE
DETAIL AD
-AC-
BASE METAL
N
F
8X
D
M_ R
0.20 (0.008)
M
AC T-U Z
0.10 (0.004) AC
NOTES: 1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982. 2. CONTROLLING DIMENSION: MILLIMETER. 3. DATUM PLANE -AB- IS LOCATED AT BOTTOM OF LEAD AND IS COINCIDENT WITH THE LEAD WHERE THE LEAD EXITS THE PLASTIC BODY AT THE BOTTOM OF THE PARTING LINE. 4. DATUMS -T-, -U-, AND -Z- TO BE DETERMINED AT DATUM PLANE -AB-. 5. DIMENSIONS S AND V TO BE DETERMINED AT SEATING PLANE -AC-. 6. DIMENSIONS A AND B DO NOT INCLUDE MOLD PROTRUSION. ALLOWABLE PROTRUSION IS 0.250 (0.010) PER SIDE. DIMENSIONS A AND B DO INCLUDE MOLD MISMATCH AND ARE DETERMINED AT DATUM PLANE -AB-. 7. DIMENSION D DOES NOT INCLUDE DAMBAR PROTRUSION. DAMBAR PROTRUSION SHALL NOT CAUSE THE D DIMENSION TO EXCEED 0.520 (0.020). 8. MINIMUM SOLDER PLATE THICKNESS SHALL BE 0.0076 (0.0003). 9. EXACT SHAPE OF EACH CORNER MAY VARY FROM DEPICTION. MILLIMETERS MIN MAX 7.000 BSC 3.500 BSC 7.000 BSC 3.500 BSC 1.400 1.600 0.300 0.450 1.350 1.450 0.300 0.400 0.800 BSC 0.050 0.150 0.090 0.200 0.500 0.700 12_ REF 0.090 0.160 0.400 BSC 1_ 5_ 0.150 0.250 9.000 BSC 4.500 BSC 9.000 BSC 4.500 BSC 0.200 REF 1.000 REF INCHES MIN MAX 0.276 BSC 0.138 BSC 0.276 BSC 0.138 BSC 0.055 0.063 0.012 0.018 0.053 0.057 0.012 0.016 0.031 BSC 0.002 0.006 0.004 0.008 0.020 0.028 12_ REF 0.004 0.006 0.016 BSC 1_ 5_ 0.006 0.010 0.354 BSC 0.177 BSC 0.354 BSC 0.177 BSC 0.008 REF 0.039 REF
J
CE
SECTION AE-AE
X DETAIL AD
GAUGE PLANE
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0.250 (0.010)
H
W
K
Q_
DIM A A1 B B1 C D E F G H J K M N P Q R S S1 V V1 W X
-T-, -U-, -Z-
EE EE EE EE
MC10EP116
Notes
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MC10EP116
Notes
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MC10EP116
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MC10EP116/D

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